This invention relates to executing multi-cycle instructions in a programmable processor.
A programmable processor, such as a microprocessor for a computer or a digital signal processing system, may support one or more “multi-cycle” machine instructions in which a single machine instructions directs the processor to perform multiple operations. For example, a typical multi-cycle machine instruction is a Load Multiple in which the processors performs a series of load operations in response to a single machine instruction. Another example is a “Push-Pop Multiple” instruction that directs the processor to push or pop multiple registers to or from a stack. Because multi-cycle instructions pack multiple operations into a single machine instruction, they typically reduce code size and improve operational efficiency of the programmable processor.